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Catégorie :Category: nCreator TI-Nspire
Auteur Author: Aryanist
Type : Classeur 3.0.1
Page(s) : 1
Taille Size: 8.87 Ko KB
Mis en ligne Uploaded: 14/12/2024 - 06:04:27
Uploadeur Uploader: Aryanist (Profil)
Téléchargements Downloads: 2
Visibilité Visibility: Archive publique
Shortlink : http://ti-pla.net/a4405349
Type : Classeur 3.0.1
Page(s) : 1
Taille Size: 8.87 Ko KB
Mis en ligne Uploaded: 14/12/2024 - 06:04:27
Uploadeur Uploader: Aryanist (Profil)
Téléchargements Downloads: 2
Visibilité Visibility: Archive publique
Shortlink : http://ti-pla.net/a4405349
Description
Fichier Nspire généré sur TI-Planet.org.
Compatible OS 3.0 et ultérieurs.
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Quiz 1 Q: 1. DMA controller can steal cycles from CPU (within an instruction cycle) A: at multiple pre-defined instances Q: DMA controller can interrupt the CPU (within an instruction cycle) A: at one pre-defined instance Q: Which of the following is/are not function(s) of I/O module/controller? A: CPU management and power management Q: Which of the following is/are function(s) of I/O module/controller? A: I/O Device communication, clock management, error detection Q: Unique disadvantage(s) of any interrupt based I/O management over programmed I/O management is/are A: hardware complexity and interrupt scheduling Q: Unique advantage(s) of any interrupt based I/O management over programmed I/O management is/are A: CPU performance Q: The statement For a device write (memory to device) on a uniprocessor computer with Programmed I/O, the device will always get the most recent data A: seems true Q: The statement For a memory read (memory to device) on a shared memory multi-processor computer with Programmed I/O, the device will always get the most recent data A: seems true Q: Upon receiving an interrupt, the CPU A: finishes the current instruction execution first Q: Which of the following is/are a part of the set of information sent by the CPU to the DMA A: main memory address, data size, and device address Q: Which of the following is/are not a part of the set of information sent by the CPU to the DMA A: number of clock cycles, interrupt priority, and interrupt ID Q: In general terms, with increased distance from the processor, primary memory's A: size increases Q: In general terms, with increased distance from the processor, primary memory's A: speed and cost decrease Q: The advantages of Daisy chained bus arbitration is/are A: less hardware requirement Q: The disadvantages of Daisy chained bus arbitration is/are A: b) much slower c) less fair d) less flexible Q: Upon cache miss, fetching the referenced data along with the entire memory block (where the data was residing) from the main memory to the cache is an example of memory management based on A: c) both spatial and temporal locality of data Q: Upon a cache miss, if the referenced data is not found in the main memory, it will be fetched from the disk. This fetching of the referenced data along with the entire memory block (where the data was residing) from the disk to the main memory and again to the cache is an example of memory management based on A: c) both spatial and temporal locality of data Quiz 2 Q: A SIMD implementation without lockstep after every instruction may lead to A: a) SISD b) MISD Q: Main disadvantages of Shared Memory architecture in multiprocessors is/are A: b) overhead of scaling c) cost of scaling Q: Which of the following is/are some of the advantage(s) of cloud computing over classical computing A: a) elasticity of resources c) resource utilization d) availability of unlimited resource Q: Imagine that the demand for data processing in an organization follows a predicable distribution that is not uniform. Now when such an organization runs out of server capacity, it should ideally A: b) offload computation to cloud Q: Hypervisor is a piece of software that can host A: a) operating systems b) applications Q: In traditional computer systems, the bootstrap loader is located in A: a) ROM Q: Which of the following is/are some of the advantage(s) of microkernels A: a) better kernel scalability b) secure access to kernel d) flexibility of new hardware integration Q: The statement All functions within a programming language library are wrapper functions is A: false Q: The statement Command line interpreters are never implemented in the kernel is A: a) True Q: Which of the following is/are OS service(s) A: a) memory management c) ensuring user data privacy d) ensuring secured access to system resources e) inter-process communication Quiz 3 Q: Which of the following is/are not part of the heap memory for a process? A: ii. function return address iii. global constants iv. uninitialized global variables Q: The statement Size of the heap memory for a process can grow without bounds is A: FALSE Q: The statement A running process (at CPU) interrupted for some reason must always be pushed to the wait queue first before it can be sent to the ready queue is A: FALSE Q: Main disadvantages of Distributed Memory architecture in multiprocessors is/are A: i. manageability problems for programmers iv. speed of access Q: The statement All functions within a programming language library are wrapper functions is A: FALSE Q: Which of the following is/are not OS service(s) A: ii. error correction Q: The statement For a device write (memory to device) on a distributed memory multi-processor with Programmed I/O, the device will always get the most recent data A: ii. may not be always true Q: The disadvantages of centralized parallel arbitration is/are A: i. more hardware requirement Q: A process goes from running to ready state A:
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Compatible OS 3.0 et ultérieurs.
<<
Quiz 1 Q: 1. DMA controller can steal cycles from CPU (within an instruction cycle) A: at multiple pre-defined instances Q: DMA controller can interrupt the CPU (within an instruction cycle) A: at one pre-defined instance Q: Which of the following is/are not function(s) of I/O module/controller? A: CPU management and power management Q: Which of the following is/are function(s) of I/O module/controller? A: I/O Device communication, clock management, error detection Q: Unique disadvantage(s) of any interrupt based I/O management over programmed I/O management is/are A: hardware complexity and interrupt scheduling Q: Unique advantage(s) of any interrupt based I/O management over programmed I/O management is/are A: CPU performance Q: The statement For a device write (memory to device) on a uniprocessor computer with Programmed I/O, the device will always get the most recent data A: seems true Q: The statement For a memory read (memory to device) on a shared memory multi-processor computer with Programmed I/O, the device will always get the most recent data A: seems true Q: Upon receiving an interrupt, the CPU A: finishes the current instruction execution first Q: Which of the following is/are a part of the set of information sent by the CPU to the DMA A: main memory address, data size, and device address Q: Which of the following is/are not a part of the set of information sent by the CPU to the DMA A: number of clock cycles, interrupt priority, and interrupt ID Q: In general terms, with increased distance from the processor, primary memory's A: size increases Q: In general terms, with increased distance from the processor, primary memory's A: speed and cost decrease Q: The advantages of Daisy chained bus arbitration is/are A: less hardware requirement Q: The disadvantages of Daisy chained bus arbitration is/are A: b) much slower c) less fair d) less flexible Q: Upon cache miss, fetching the referenced data along with the entire memory block (where the data was residing) from the main memory to the cache is an example of memory management based on A: c) both spatial and temporal locality of data Q: Upon a cache miss, if the referenced data is not found in the main memory, it will be fetched from the disk. This fetching of the referenced data along with the entire memory block (where the data was residing) from the disk to the main memory and again to the cache is an example of memory management based on A: c) both spatial and temporal locality of data Quiz 2 Q: A SIMD implementation without lockstep after every instruction may lead to A: a) SISD b) MISD Q: Main disadvantages of Shared Memory architecture in multiprocessors is/are A: b) overhead of scaling c) cost of scaling Q: Which of the following is/are some of the advantage(s) of cloud computing over classical computing A: a) elasticity of resources c) resource utilization d) availability of unlimited resource Q: Imagine that the demand for data processing in an organization follows a predicable distribution that is not uniform. Now when such an organization runs out of server capacity, it should ideally A: b) offload computation to cloud Q: Hypervisor is a piece of software that can host A: a) operating systems b) applications Q: In traditional computer systems, the bootstrap loader is located in A: a) ROM Q: Which of the following is/are some of the advantage(s) of microkernels A: a) better kernel scalability b) secure access to kernel d) flexibility of new hardware integration Q: The statement All functions within a programming language library are wrapper functions is A: false Q: The statement Command line interpreters are never implemented in the kernel is A: a) True Q: Which of the following is/are OS service(s) A: a) memory management c) ensuring user data privacy d) ensuring secured access to system resources e) inter-process communication Quiz 3 Q: Which of the following is/are not part of the heap memory for a process? A: ii. function return address iii. global constants iv. uninitialized global variables Q: The statement Size of the heap memory for a process can grow without bounds is A: FALSE Q: The statement A running process (at CPU) interrupted for some reason must always be pushed to the wait queue first before it can be sent to the ready queue is A: FALSE Q: Main disadvantages of Distributed Memory architecture in multiprocessors is/are A: i. manageability problems for programmers iv. speed of access Q: The statement All functions within a programming language library are wrapper functions is A: FALSE Q: Which of the following is/are not OS service(s) A: ii. error correction Q: The statement For a device write (memory to device) on a distributed memory multi-processor with Programmed I/O, the device will always get the most recent data A: ii. may not be always true Q: The disadvantages of centralized parallel arbitration is/are A: i. more hardware requirement Q: A process goes from running to ready state A:
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