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Test matériel TI-Nspire CX CR4 sécurisées contre l'ouverture

:32tins: :32tinsktpb: :32tinsktpn: :32tinscas: :32tinstpkc: :32tinstpktpb: :32tinstp: :32tinscastp: :32tinscmc: :32tinscx: :32tinscxcas:

Re: Test matériel TI-Nspire CX CR4 sécurisées contre l'ouver

Unread postby critor » 07 May 2017, 20:35

Pinout visuel de la puce Macronix MX29SL402C contenant le Boot1 4.0.1.43 externe :


Suffit-il de dessouder CE# (Chip Enable) pour que l'ASIC démarre sur son Boot1 3.0.0.99 interne compatible nBoot/ControlX ? ;)
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Re: Test matériel TI-Nspire CX CR4 sécurisées contre l'ouver

Unread postby Bisam » 07 May 2017, 21:20

Pinout visuel de la puce Macronix MX29SL402C contenant le Boot1 4.0.1.43 externe

...la puce Macronix...

...Macron...


Il est partout !! :troll:
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Re: Test matériel TI-Nspire CX CR4 sécurisées contre l'ouver

Unread postby parrotgeek1 » 07 May 2017, 22:36

critor wrote:Suffit-il de dessouder CE# (Chip Enable) pour que l'ASIC démarre sur son Boot1 3.0.0.99 interne compatible nBoot/ControlX ? ;)

i think you only need to short 2 data pins with some wire, then it will fail to initialize the nor
so you don't have to cut anything

Would be interesting to try to enable write...
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Re: Test matériel TI-Nspire CX CR4 sécurisées contre l'ouver

Unread postby critor » 08 May 2017, 23:04

Doesn't work.

I've tried to short :
- CE# + GND
- OE# + GND
- Q0 + Q8
- A1 + A2
- A14 + A15

You get a black screen, until you unshort the contacts.
It seems the ASIC knows it has to boot on an external Flash-NOR, for some other reason.
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Re: Test matériel TI-Nspire CX CR4 sécurisées contre l'ouver

Unread postby parrotgeek1 » 08 May 2017, 23:20

critor wrote:Doesn't work.

I did try to short :
- CE# + GND
- OE# + GND
- Q0 + Q8
- A1 + A2
- A14 + A15

You get a black screen, until you unshort the contacts.
It seems the ASIC knows it has to boot on an external Flash-NOR, for some other reason.

try to compare a really early A-D version with TI-Nspire Color. Maybe there is some resistor somewhere that tells it to use external flash
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Re: Test matériel TI-Nspire CX CR4 sécurisées contre l'ouver

Unread postby critor » 09 May 2017, 11:48

It could be an inaccessible ASIC pin which is just grounded or not grounded.

What may help, would be to check if we could switch the boot image on some older TI-Nspire models which had :
- accessible+visible ASIC pins
- an external Flash-NOR

Among them :
  • first TI-Nspire & TI-Nspire CAS ClickPad (not revised, revision A, and maybe revision B)
    ASIC = LSI Logic Zevio
    Flash NOR = SST 39WF400A
  • TI-Nspire Lab cradle
    ASIC = Magnum Zevio
    Flash NOR = cFeon EN39SL800 (seems to be pin-compatible with the SST one)
    8338

The TI-Nspire Lab cradle could be compared with the TI-Nspire TouchPad, since it's using the exact same Magnum Zevio ASIC :
http://datamath.org/Graphing/NSpire_CAS_TP.htm

So unlike on the TI-Nspire TouchPad, on the TI-Nspire Lab cradle something is telling the Magnum Zevio ASIC to boot on the external Flash-NOR 'Lab' Boot1 3.0.1.1761, instead of the internal ClickPad/TouchPad Boot1 1.1.8916.
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