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Nouvelles TI-Nspire CX CR6 (révision Y)

:32tins: :32tinsktpb: :32tinsktpn: :32tinscas: :32tinstpkc: :32tinstpktpb: :32tinstp: :32tinscastp: :32tinscmc: :32tinscx: :32tinscxcas:

Quels changements dans les TI-Nspire CX CR6 selon toi ?

puce Flash-NOR sans pattes accessibles
0
No votes
puce Flash-NOR mieux intégrée au circuit
0
No votes
suppression puce Flash-NOR
3
30%
suppression port JTAG/J04
2
20%
nouvelle puce ASIC
5
50%
 
Total votes : 10

Re: Nouvelles TI-Nspire CX CR6 (révision Y)

Unread postby parrotgeek1 » 08 May 2017, 16:18

.
Last edited by parrotgeek1 on 08 Jan 2021, 01:03, edited 1 time in total.
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Re: Nouvelles TI-Nspire CX CR6 (révision Y)

Unread postby critor » 08 May 2017, 16:20

I've dumped everything with Polydumper.

The manuf is the same as the one on CR4/HW-W.

Polydumper is able to :
  • dump the Boot1 set as the default boot image (whether it's inside the ASIC or in an external Flash-NOR)
  • dump the ASIC internal Boot1 image

So it can return up to 2 different Boot1 images.

On HW-W, both Boot1 images were different.
On HW-Y, both Boot1 images are identical.
Since there is no Flash-NOR anymore according to Adriweb, then it implies the calculator is booting on the ASIC internal Boot1 image - thus it's the same image which is dumped twice.
And of course, it's the new 4.0.1 Boot1, hence the new ASIC.
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Re: Nouvelles TI-Nspire CX CR6 (révision Y)

Unread postby critor » 08 May 2017, 18:44

I've just managed to get the CR6 bootlog :
83378336

It seems to confirm most of our discoveries :
Code: Select all
Boot Loader Stage 1 (4.0.1.43)
Build: 2015/7/20, 14:47:25
Copyright (c) 2006-2015 Texas Instruments Incorporated
Using production keys

Last boot progress: 2060

Available system memory: 28072
Checking for NAND: NAND Flash ID: WINBOND   
SDRAM size: 64 MB
SDRAM memory test:   Pass
Clearing SDRAM...Done.
Clocks:  CPU = 156MHz   AHB = 78MHz   APB = 39MHz   
Clearing SDRAM...Done.
Boot option: Normal

Loading from BOOT2 partition...


6%
13%
19%
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32%
44%
57%
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66%
72%
78%
84%
91%
97%
100%

BOOT1: loading complete (120 ticks), launching <BOOT1.5> image.



Boot Loader Stage 1.5 (4.4.0.8)
Build: 2016/8/10, 16:15:40
Copyright (c) 2006-2016 Texas Instruments Incorporated
Using production keys

Clocks:  CPU = 156MHz   AHB = 78MHz   APB = 39MHz   
Checking for NAND: NAND Flash ID: WINBOND   


Initializing graphics subsystem.

Loading from Boot 2 partition...


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BOOT1.5: loading complete (383 ticks), launching <BOOT2> image.






Boot Loader Stage 2 (4.4.0.8)
Build: 2016/8/10, 16:32:3
Copyright (c) 2006-2016 Texas Instruments Incorporated
Using production keys

Clocks:  CPU = 156MHz   AHB = 78MHz   APB = 39MHz
Checking for NAND: NAND Flash ID: WINBOND   
This device is a CXCR.
TI_PM_SetShipMode:  FALSE
GP LCD.


Initializing graphics subsystem.
GP LCD.
Boot option: Normal


Initializing filesystem.
  Skipping NAND workaround.
Datalight Reliance v2.10.1150
Copyright (c) 2003-2006 Datalight, Inc.
Datalight FlashFX Pro v3.00 Build 1358
Nucleus Edition for ARM9
Copyright (c) 1993-2006 Datalight, Inc.
Patents: US#5860082, US#6260156.
FB NAND Flash Controller
Filesystem ready.
Purging temporary files...

Loading Operating System...


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BOOT2: loading complete (2474 ticks), launching <TI-Nspire> image.



TI-nSpire OS (4.4.0.532)
Build: 2016/12/15, 14:41:30
Copyright (c) 2006-2016 Texas Instruments Incorporated

Beginning system initialization.
Clocks:  CPU = 156 MHz AHB = 78 MHz APB = 39 MHz

This device is a CXCR.
TI_PM_SetShipMode:  FALSE
GP LCD.
  Skipping NAND workaround.
Preparing file system. This takes a while...
   POSIX layer initialized.
   POSIX "NULL" device initialized.
   POSIX "CONSOLE" device initialized.
Datalight Reliance v2.10.1150
Copyright (c) 2003-2006 Datalight, Inc.
Datalight FlashFX Pro v3.00 Build 1358
Nucleus Edition for ARM9
Copyright (c) 1993-2006 Datalight, Inc.
Patents: US#5860082, US#6260156.
FB NAND Flash Controller

   POSIX file system initialized.
File system ready.





TOTAL BYTES: 101493
------------------ Module is Gone!!
TouchPad Firmware Revision : 01060000

Created Execution Context
<TI_PCL_Init2> SetSystem Settings   -->
<TI_PCL_Init2> TI_RM_LoadAllStrings -->
<TI_PCL_Init2> TI_UI_IME_Init -->
<TI_PCL_Init2> RegisterC1Widgets -->
<TI_PCL_Init2> TI_GOIO_InitializeGoIO -->
<TI_PCL_Init2> TI_AM_Initialize -->
Product   : 16 (defined in os/inc/deviceinfo.h)
Platform  : 2 (defined in documentmanager/inc/hal.h)
Version   : 3.6.0.337 CE
Build Date: 2013-5-10
TI_PM_DIM_settime: Dim set to 90.
GP LCD.
RET - Echo UDP: TI_Echo_UDP_Init called +++
RET - ECHO UDP: EchoUDPListenerThread. Inside Thread +++
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